The SImulator for Multithreaded Computer Architecture

Overview The SImulator for Multi-threaded Computer Archi-tecture(SIMCA) is built on top of the SimpleScalar tool set [1] in an effort to evaluate the performance of the superthreaded architecture [4, 5], and to explore the different design alternatives. Our compiler can compile superthreaded source codes written in C or FORTRAN into superthreaded binary, and this binary runs on the SIMCA. All processes are automated. The performance of SIMCA with no compiler optimization on an SGI Challenge Cluster with R1000 processors is about a 15 to 20 thousand instructions per second when the program is highly superthreaded, and about 15 thousand instructions per second when only one thread-unit is active. The main contribution of this simulator is that it resolves many questions on the details of the hardware design, and it serves as a guide for the actual hardware implementation.